Archive

Posts Tagged ‘SDRAM’

SDRAM panic

January 31st, 2011 No comments

Today I continued with my FPGA-DMX controller project. I already made good progress as you could have read in my previous post. The next challenge was to get the SDRAM up and running. The Altera DE2 board, which I use for this project, has also 512K of SRAM which is much faster than DRAM. The SRAM already works but is too small to hold my light control data. The SDRAM on the DE2 board is 8MB, which should be sufficient. After finishing my application logic using the SDRAM the next step is to use Flash or SD-card as memory for the light controller data.

Sounds all very exciting, but first I had to make sure the SDRAM does actually work. After some reading about the IP-CORE SDRAM controller and the chip itself I wrote a small test setup containing a NIOS2 core and a PLL for the clock phase conversion. The PLL was set at -54 degrees, which should result in a 3ns delay on the system clock. In another (lost the link) manual I found out that it is safer to put your normal clock also through the PLL module with just a 0 degree phase shift. This is because the PLL it selves also takes some time which can result in wrong phase shift.

The picture above shows the NIOS system and the PLL. Next step is to write an application to test the SDRAM. Write data to the SDRAM and read it back. report data mismatches to an error counter. This sounds pretty easy. Setting up this code was indeed. See the example below:

#include <stdio.h>
#include <unistd.h>
#include "system.h"
#include "alt_types.h"
#include "altera_avalon_pio_regs.h"

/* Memory constants */
#define SDRAM_MAX_WORDS 100000

alt_u32 test_sdram( void ) {
	alt_u32 i;
	alt_u32 errors = 0;
	alt_u32 *buffer = (alt_u32 *)SDRAM_BASE;
	/* Write data to SDRAM */
	for( i = 0; i < SDRAM_MAX_WORDS; i++ ) {
		printf("SET row: %d\n", i);
		buffer[i] = i + 1000000;
	}
	/* Check output from SDRAM */
	for( i = 0; i < SDRAM_MAX_WORDS; i++ ) {
		printf("GET row: %d\n", i);

		if( buffer[i] != (i+1000000) )
			errors++;
	}
	return( errors );
}

int main( void ) {
	alt_u32 ret_val;
	printf( "Welcome...\n" );
	printf("Testing SDRAM\n" );

	ret_val = test_sdram();
	printf("...Completed with %d Errors.\n", ret_val );

	return(0);
}

When I ran this code on my NIOS system the console started printing… But at the 42’th SET action the complete system crashed. I made several modifications in my NIOS core, changed the phase shift, used different NIOS core types etc. Nothing worked. After several hours I almost gave up. One last thing to check. The software uses a generated BSP (Board Support Package). In this package are also the memory mappings for several areas of the NIOS system defined. I found out, the BSP standard uses SDRAM for these memory areas.

Overwriting the memory sections used by the system results in instant system failure. Doh… After changing these areas to the SRAM the read/write test finished successfully :D.

Post to Twitter

Categories: Electronica, Technologie Tags: , , , , , , ,